Product Summary

The BS616LV1010ECP-70 is a high performance, very low power CMOS Static Random Access Memory organized as 65,536 words by 16 bits and operates from a wide range of 2.4V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.02uA and maximum access time of 70ns in 3V operation. Easy memory expansion of BS616LV1010ECP-70 is provided by an active LOW chip enable(CE) and active LOW output enable(OE) and three-state output drivers. The BS616LV1010ECP-70 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616LV1010ECP-70 is available in the JEDEC standard 44-pin TSOP Type II and 48-pin BGA package.

Parametrics

BS616LV1010ECP-70 absolute maximum ratings: (1)Terminal Voltage with Respect to GND, VTERM: -0.5 to Vcc+0.5V; (2)Temperature Under Bias, TBIAS: -40 to +125℃; (3)Storage Temperature, TSTG: -60 to +150℃; (4)Power Dissipation, PT: 1.0W; (5)DC Output Current, IOUT: 20mA.

Features

BS616LV1010ECP-70 features: (1)Very low operation voltage : 2.4 to 5.5V; (2)Very low power consumption; (3)High speed access time: -70 to 70ns (Max.) at Vcc = 3.0V; (4)Automatic power down when chip is deselected; (5)Three state outputs and TTL compatible; (6)Fully static operation; (7)Data retention supply voltage as low as 1.5V; (8)Easy expansion with CE and OE options; (9)I/O Configuration x8/x16 selectable by LB and UB pin.

Diagrams

BS616LV1010ECP-70 BLOCK DIAGRAM

BS61
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Data Sheet

0-1: $0.40
1-25: $0.36
25-50: $0.33
50-100: $0.31
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